TY  - JOUR
AU  - P.P. Moskvin
AU  - L.V. Rashkovetskyi
AU  - S.V. Plyatsko
AU  - S.P. Semenets
TI  - Special regularities for lowering temperature during growth of high-quality CdTe semiconductor layers
T2  - Semiconductor Physics, Quantum Electronics & Optoelectronics
PY  - 2022
VL  - 25
IS  - 1
SP  - 036
EP  - 042
DO  - 10.15407/spqeo25.01.036
UR  - https://doi.org/10.15407/spqeo25.01.036
AB  - To obtain epitaxial layers of A2B6 semiconductors with increased structural perfection from their own liquid phase, it has been proposed to use a technological process in which the synthesis temperature varies in such a manner that ensures a constant growth rate of layers during the whole process. The regularities of temperature variation with time for this process have been found on the basis of diffusion crystallization model. The developed model is realized by numerical methods and applied to description of the growth of cadmium telluride layers. Quantitative data on variations of synthesis temperature have been obtained, which can serve as a basis for choosing the temperature-time regimes of growth of cadmium telluride layers with a constant and required rate of solid phase formation.
KW  - A2B6 solid solution
KW  - epitaxial film
KW  - CdTe compound
KW  - liquid phase epitaxy
KW  - kinetics of crystallization
KW  - supercooling technology
ER  -