References

Semiconductor Physics, Quantum Electronics and Optoelectronics, 12 (1) P. 027-030 (2009).
DOI: https://doi.org/10.15407/spqeo12.01.027

References

J.G. Fossum, L. Ge and M.H. Chiang, Speed superiority of scaled double-gate CMOS // IEEE Trans. Electron, Devices 49, p. 808-811 (2002). https://doi.org/10.1109/16.998588

2. A. Kranti, T.M. Chung, D. Flandre, J.P. Raskin, 'Analysis of quasi double gate method for performance prediction of deep submicron double gate SOI MOSFETs // Semicond. Sci. Technol. 20, p. 423-429 (2008). https://doi.org/10.1088/0268-1242/20/5/017

3. F. Djeffal, M. Chahdi, A. Benhaya, M.L. Hafiane, An approach based on neural computation to simulate the nanoscale CMOS cireuits: Application to the simulation of CMOS inverter // Solid State Electronics 51, p.26-34(2007). https://doi.org/10.1016/j.sse.2006.12.004

4. F. Djeffal, M.A. Abdi, Z. Dibi, M. Chahdi, A. Benhaya, A neural approach to study the scaling capability of the undoped Double-Gate and cylindrical Gate All Around MOSFETs // Materials Sei, and Eng: B 147, p. 239-244(2008). https://doi.org/10.1016/j.mseb.2007.08.034

5. F. Djeffal, S. Guessasma, A. Benhaya, T. Bendib, 'A neural computation to study the scaling capability of the undoped DG MOSFET // Semiconductor Physics, Quantum Electronics & Optoelectronics 11, p. 196-202 (2008). https://doi.org/10.15407/spqeo11.02.196

6. H.A. El-Hamid, J. Roig, B. Iniguez, Analytical predictive modelling for the study of the scalability limits of multiple gate MOSFETs // Solid State Electronics 51, p. 414-422 (2007). https://doi.org/10.1016/j.sse.2006.12.009

7. S. Datta, Nanoscale device modelling: the Green's function method // Superlattices Microstruct. 28, p. 253-278 (2000). https://doi.org/10.1006/spmi.2000.0920

8. D.W. Boeringer, D.H. Wemer, Particle swarm optimization versus genetic algorithms for phased array synthesis // IEEE Trans. on Anten, and Propag. 52, p. 771-779 (2004). https://doi.org/10.1109/TAP.2004.825102

9. J.H. Holland, Genetic algorithms // Scientific American, p. 66-72, July 1992 https://doi.org/10.1038/scientificamerican0792-66

10. M. Chan, Y. Taur, C.-H. Lin, J. He, A.M. Nik-nejad, C. Hu, A framework for generic physics based double-gate MOSFET modeling, In Technical Proceedings of the 2003 Nanotechnology Conference and Trade Show, Vol. 2, San Francisco, California, p. 270 (2003).

11. S. Selberherr, Analysis and Simulation of Semiconductor Devices, Wien, Springer-Verlag, 1984 https://doi.org/10.1007/978-3-7091-8752-4