Semiconductor Physics, Quantum Electronics & Optoelectronics. 2016. V. 19, N 1. P. 116-123.

The charge trapping/emission processes in silicon nanocrystalline nonvolatile memory assisted by electric field and elevated temperatures
V.A. Ievtukh, V.V. Ulyanov, A.N. Nazarov

V. Lashkaryov Institute of Semiconductor Physics, NAS of Ukraine, 41, prospect Nauky, 03028 Kyiv, Ukraine E-mail:

Abstract. In this work, the influence of elevated temperatures on charge trapping in Si nanoclusters located in oxide layer of MOS structure has been comprehensively studied. The samples with one layer of nanocrystals in the oxide have been studied using the modular data acquisition setup for capacitance-voltage measurements. The memory window formation and memory window retention experimental methods were used with the aim to study the trapping/emission processes inside the dielectric layer of MOS capacitor memory within the defined range of elevated temperatures. The trap activation energy and charge localization were determined from measured temperature dependences of charge retention. The electric field dependence of the activation energy with subsequent charge emission law have been determined.

Keywords: nanocrystalline memory, MOS capacitor, charge trapping, elevated temperatures.

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