Semiconductor Physics, Quantum Electronics and Optoelectronics, 23 (2) P. 141-145 (2020).
DOI: https://doi.org/10.15407/spqeo23.02.141


References

1. Sultan S.M., Ditshego N.J., Gunn R., Ashburn P., and Chong H.M. Effect of atomic layer deposition temperature on the performance of top-down ZnO nanowire transistors. Nanoscale Res. Lett. 2014. 9, No 1. Article number 517. https://doi.org/10/1186/1556-276X-9-517.
https://doi.org/10.1186/1556-276X-9-517
2. Bayraktaroglu B., Leedy K., and Neidhard R. High-frequency ZnO thin-film transistors on Si substrates. 2009. 30, No 9. P. 946-948. https://doi.org/10.1109/LED.2009.2025672.
https://doi.org/10.1109/LED.2009.2025672
3. Cheng-Liang Hsu, Tsai Tsung-Ying. Fabrication of fully transparent indium-doped ZnO nanowire field-effect transistors on ITO/glass substrates. J. Electrochem. Soc. 2011. 158, No 2. P. K20-K23. https://doi.org/10.1149/1.3517078.
https://doi.org/10.1149/1.3517078
4. Zhou Yu-Ming, He Yi-Gang, Lu Ai-Xia, and Wan Qing. Simulation of grain boundary effect on cha-racteristics of ZnO thin film transistor by consi-dering the location and orientation of grain boun-dary. Chinese Phys. B. 2009. 18, No 9. P. 3966-3969. https://doi.org/10.1088/1674-1056/18/9/057.
https://doi.org/10.1088/1674-1056/18/9/057
5. Hossain F., Nishii J. and Takagi S. et al. Modeling and simulation of polycrystalline ZnO thin film transistors. J. Appl. Phys. 2003. 94, No 12. P. 7768-7777. https://doi.org/10.1063/1.1628834.
https://doi.org/10.1063/1.1628834
6. Alivisatos A.P. Semiconductor clusters, nano-crystals, and quantum dots. Science. 1996. 271, Issue 5251. P. 933-937. https://doi.org/10.1126/science.271.5251.933.
https://doi.org/10.1126/science.271.5251.933
7. Tang Z., Kotov N.A. One-dimensional assemblies of nanoparticles: Preparation, properties, and promise. Adv. Mater. 2005. 17, No 8. P. 951-962. https://doi.org/10.1002/adma.200401593.
https://doi.org/10.1002/adma.200401593
8. Lu W., Lieber C.M. Nanoelectronics from the bottom up. Nat. Mater. 2007. 6, No 11. P. 841-850. https://doi.org/10.1038/nmat2028.
https://doi.org/10.1038/nmat2028
9. http:// www.itrs.net/links/2010itrs.
10. Sarker Sh., Islam M.M., Alam N.K., Islam R. Gate dielectric strength dependent performance of CNT MOSFET and CNT TFET: A tight binding study. Results in Physics, C. 2016. 6. P. 879-883. https://doi.org/10.1109/ICCITECHN.2016.7860188
https://doi.org/10.1109/ICCITECHN.2016.7860188
11. Lee J.H., Koh K., Lee N.I. et al. Effects of polysilicon gate on the flatband voltage shift and mobility degradation for ALD-Al2O3 gate dielectric. IEDM Tech. Dig. 2000. P. 645-648.
12. Jing Guo, Supriyo Datta, Lundstrom M., Anantam M.P. Toward multi-scale modeling of carbon nanotube transistors. Intern. J. Multiscale Computat. Eng. 2004. 2, No 2. P. 257-276. https://doi.org/10.1615/IntJMultCompEng.v2.i2.60.
https://doi.org/10.1615/IntJMultCompEng.v2.i2.60
13. Koswatta S., Jing Guo, Nikonov D.E. MOSCNT: Code for carbon nanotube transistor simulation. IEEE IEDM Tech. Digest. 2006. P. 518.
14. Svizhenko A., Anantram M.P., Govindan T.R. et al. Two dimensional quantum mechanical modeling of nanotransistors. J. Appl. Phys. 2001. 91. P. 2343-2355. https://doi.org/10.1063/1.1432117.
https://doi.org/10.1063/1.1432117
15. Clifford J.P., John D.L., Castro L.C., Pulfrey D.L. Electrostatics of partially gated carbon nanotube FETs. IEEE Transactions on Nanotechnology. 2004. 3. P. 281-286. https://doi.org/ 10.1109/TNANO.2004.828539.
https://doi.org/10.1109/TNANO.2004.828539